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ICCD
2000
IEEE
137views Hardware» more  ICCD 2000»
15 years 8 months ago
Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
Alexandre Solomatnikov, Kaushik Roy, Cheng-Kok Koh...
BIRTHDAY
1997
Springer
15 years 8 months ago
Expressive Power of Unary Counters
We compare the expressive power on finite models of two extensions of first order logic L with equality. L(Ct) is formed by adding an operator count{x : ϕ}, which builds a term ...
Michael Benedikt, H. Jerome Keisler
FPL
2006
Springer
219views Hardware» more  FPL 2006»
15 years 8 months ago
FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...
François-Xavier Standaert, Gaël Rouvro...
IMECS
2007
15 years 5 months ago
Low Power Bus Encoding Technique Considering Coupling Effects
— In this paper, we propose a bus encoding scheme to minimize coupling effects which cause significant power consumption in the on-chip interconnects. The proposed bus encoding s...
H. W. Lin, K. C. Wei
TVLSI
2002
93views more  TVLSI 2002»
15 years 4 months ago
Simultaneous switching noise in on-chip CMOS power distribution networks
Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra lar...
Kevin T. Tang, Eby G. Friedman