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ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
15 years 11 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
DATE
2006
IEEE
122views Hardware» more  DATE 2006»
15 years 10 months ago
Power analysis of mobile 3D graphics
— The world of 3D graphics, until recently restricted to high-end workstations and game consoles, is rapidly expanding into the domain of mobile platforms such as cellular phones...
Bren Mochocki, Kanishka Lahiri, Srihari Cadambi
MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
15 years 9 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas
DAC
2005
ACM
16 years 5 months ago
Device and architecture co-optimization for FPGA power reduction
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
ICC
2007
IEEE
185views Communications» more  ICC 2007»
15 years 10 months ago
Maximal Lifetime Rate and Power Allocation for Sensor Networks with Data Distortion Constraints
— We address a lifetime maximization problem for a single-hop wireless sensor network where multiple sensors encode and communicate their measurements of a Gaussian random source...
James C. F. Li, Subhrakanti Dey, Jamie S. Evans