In this paper, a new flip-flop called Double-edge triggered Feedback Flip-Flop (DFFF) is proposed. The dynamic power consumption of DFFF is reduced by avoiding unnecessary interna...
S. H. Rasouli, A. Amirabadi, A. Seyedi, Ali Afzali...
The power versus frequency performance of a micropipelined conventional CMOS logic family is compared with that of three similarly pipelined energy-recovering logic families. Usin...
—In typical home power-line communication (PLC) networks using contention-based access methods, providing Quality-of-service (QoS) to high-priority users often comes at the expen...
Aakanksha Chowdhery, Sumanth Jagannathan, John M. ...
—The modeling of energy components in Wireless Sensor Network (WSN) simulation is important for obtaining realistic lifetime predictions and ensuring the faithful operation of en...
Geoff V. Merrett, Alex S. Weddell, A. P. Lewis, Ni...
— In this paper, we propose a novel supernode caching scheme to reduce IP lookup latencies and energy consumption in network processors. In stead of using an expensive TCAM based...