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IEEEPACT
2008
IEEE
16 years 8 days ago
Multi-optimization power management for chip multiprocessors
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
Ke Meng, Russ Joseph, Robert P. Dick, Li Shang
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
15 years 11 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
151
Voted
DAC
2006
ACM
16 years 6 months ago
Stochastic variational analysis of large power grids considering intra-die correlations
For statistical timing and power analysis that are very important problems in the sub-100nm technologies, stochastic analysis of power grids that characterizes the voltage fluctua...
Praveen Ghanta, Sarma B. K. Vrudhula, Sarvesh Bhar...
ICC
2007
IEEE
154views Communications» more  ICC 2007»
16 years 5 days ago
Distributed Adaptive Power Allocation for Wireless Relay Networks
— In this paper, we consider a 2-hop wireless diversity relay network. We explore transmit power allocation among the source and relays to maximize the received signal to noise r...
Yonghui Li, Branka Vucetic, Zhendong Zhou, Mischa ...
PATMOS
2007
Springer
15 years 12 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...