—We present an inter-architectural comparison of single- and double-precision direct n-body implementations on modern multicore platforms, including those based on the Intel Neha...
Nitin Arora, Aashay Shringarpure, Richard W. Vuduc
In future large-scale multi-core microprocessors, hard errors and process variations will create dynamic heterogeneity, causing performance and power characteristics to differ amo...
— In many applications where speech separation and enhancement is of interest, e.g. conferencing systems, mobile phones and hearing aids, accurate speaker localization is importa...
Abstract— In previous work, we studied the structure and performance of optimum maximum-likelihood receivers for binary antipodal and orthogonal signals in the presence of Gaussi...
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...