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CODES
2007
IEEE
15 years 9 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
145
Voted
COMPSAC
2002
IEEE
15 years 8 months ago
Application of Hazard Analysis to Software Quality Modelling
Quality is a fundamental concept in software and information system development. It is also a complex and elusive concept. A large number of quality models have been developed for...
Hong Zhu, Yanlong Zhang, Qingning Huo, Sue Greenwo...
CODES
2006
IEEE
15 years 9 months ago
Layout aware design of mesh based NoC architectures
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
Krishnan Srinivasan, Karam S. Chatha
TC
2010
14 years 10 months ago
Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods
This paper proposes two improved interleaved modular multiplication algorithms based on Barrett and Montgomery modular reduction. The algorithms are simple and especially suitable ...
Miroslav Knezevic, Frederik Vercauteren, Ingrid Ve...
120
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AMAST
2008
Springer
15 years 5 months ago
An Algebra for Features and Feature Composition
Feature-Oriented Software Development (FOSD) provides a multitude of formalisms, methods, languages, and tools for building variable, customizable, and extensible software. Along d...
Sven Apel, Christian Lengauer, Bernhard Mölle...