254 search results - page 23 / 51 » Compilation Techniques for Out-of-Core Parallel Computations |
101
click to vote
ICS
1999
Tsinghua U.
15 years 4 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
IEEEPACT
2007
IEEE
15 years 6 months ago
2007
IEEE
Performance auditing is an online optimization strategy that empirically measures the effectiveness of an optimization on a particular code region. It has the potential to greatly...
SAC
2004
ACM
15 years 5 months ago
2004
ACM
This paper presents an overview of our work, concerning a complete end-to-end framework for automatically generating message passing parallel code for tiled nested for-loops. It c...
116
click to vote
CASES
2007
ACM
15 years 3 months ago
2007
ACM
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
ICS
2007
Tsinghua U.
15 years 6 months ago
2007
Tsinghua U.
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...