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ICCD
2000
IEEE
93views Hardware» more  ICCD 2000»
15 years 6 months ago
Cheap Out-of-Order Execution Using Delayed Issue
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
J. P. Grossman
CJ
1999
126views more  CJ 1999»
14 years 9 months ago
Source Level Static Branch Prediction
The ability to predict the directions of branches, especially conditional branches, is an important problem in modern computer architecture and advanced compilers. Many static and...
W. F. Wong
ICCD
2003
IEEE
167views Hardware» more  ICCD 2003»
15 years 6 months ago
Virtual Page Tag Reduction for Low-power TLBs
We present a methodology for a power-optimized, software-controlled Translation Lookaside Buffer (TLB) organization. A highly reduced number of Virtual Page Number (VPN) bits sufï...
Peter Petrov, Alex Orailoglu
ICDE
2010
IEEE
202views Database» more  ICDE 2010»
15 years 9 months ago
Generating code for holistic query evaluation
We present the application of customized code generation to database query evaluation. The idea is to use a collection of highly efficient code templates and dynamically instantiat...
Konstantinos Krikellas, Marcelo Cintra, Stratis Vi...
ISHPC
2003
Springer
15 years 2 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos