143 search results - page 25 / 29 » Compiled hardware acceleration of Molecular Dynamics code |
ARC
2007
Springer
15 years 1 months ago
2007
Springer
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
115
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SIGMETRICS
1996
ACM
15 years 1 months ago
1996
ACM
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
DAC
1999
ACM
15 years 10 months ago
1999
ACM
? The economic viability of the reusable core-based design paradigm depends on the development of techniques for intellectual property protection. We introduce the first dynamic wa...
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
The Dynamic Execution Layer Interface (DELI) offers the following unique capability: it provides fine-grain control over the execution of programs, by allowing its clients to obse...
IEEEPACT
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents an automated performance tuning solution, which partitions a program into a number of tuning sections and finds the best combination of compiler options for e...