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» Compiled hardware acceleration of Molecular Dynamics code
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HPCC
2009
Springer
15 years 2 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
USENIX
2001
14 years 11 months ago
The X Resize and Rotate Extension - RandR
The X Window System protocol, Version 11, was deliberately designed to be extensible, to provide for both anticipated and unanticipated needs. The X11 core did not anticipate that...
Jim Gettys, Keith Packard
CGO
2009
IEEE
15 years 4 months ago
Scenario Based Optimization: A Framework for Statically Enabling Online Optimizations
Abstract—Online optimization allows the continuous restructuring and adaptation of an executing application using live information about its execution environment. The further ad...
Jason Mars, Robert Hundt
ISCA
2007
IEEE
161views Hardware» more  ISCA 2007»
15 years 3 months ago
Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors
We explore the emerging application area of physics-based simulation for computer animation and visual special effects. In particular, we examine its parallelization potential and...
Christopher J. Hughes, Radek Grzeszczuk, Eftychios...
FPL
2005
Springer
131views Hardware» more  FPL 2005»
15 years 3 months ago
An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications
Dynamically reconfigurable logic is becoming an important design unit in SoC system. A method to make the reconfiguration management transparent to software applications is requir...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi