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» Compiled hardware acceleration of Molecular Dynamics code
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CASES
2009
ACM
15 years 4 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
CASES
2010
ACM
14 years 7 months ago
Resource recycling: putting idle resources to work on a composable accelerator
Mobile computing platforms in the form of smart phones, netbooks, and personal digital assistants have become an integral part of our everyday lives. Moving ahead to the future, m...
Yongjun Park, Hyunchul Park, Scott A. Mahlke, Sukj...
SIGPLAN
2008
14 years 9 months ago
A parallel dynamic compiler for CIL bytecode
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...
Simone Campanoni, Giovanni Agosta, Stefano Crespi-...
APCSAC
2004
IEEE
15 years 1 months ago
Continuous Adaptive Object-Code Re-optimization Framework
Dynamic optimization presents opportunities for finding run-time bottlenecks and deploying optimizations in statically compiled programs. In this paper, we discuss our current impl...
Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Ye...
CGO
2003
IEEE
15 years 2 months ago
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
Howard Chen, Wei-Chung Hsu, Dong-yuan Chen