138 search results - page 13 / 28 » Compiled-code-based simulation with timing verification |
120
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DAC
2004
ACM
16 years 19 days ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
83
Voted
CODES
2004
IEEE
15 years 3 months ago
2004
IEEE
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
89
Voted
DAC
2005
ACM
16 years 19 days ago
2005
ACM
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
94
Voted
RTAS
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper formulates and illustrates the integration of resource safety verification into a design methodology for development of verified and robust real-time embedded systems. ...
ISSS
2002
IEEE
15 years 4 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...