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FPL
2007
Springer
105views Hardware» more  FPL 2007»
15 years 5 months ago
An Execution Model for Hardware/Software Compilation and its System-Level Realization
We introduce a new execution model for orchestrating the interaction between the conventional processor and the reconfigurable compute unit in adaptive computer systems. We then ...
Holger Lange, Andreas Koch
SIBGRAPI
1999
IEEE
15 years 4 months ago
Multiple Display Viewing Architecture for Virtual Environments over Heterogeneous Networks
Visualization systems that support multiple-display viewing can greatly enhance user perception. The common approach to provide multiple synchronized views uses a powerful centrali...
Alexandre G. Ferreira, Renato Cerqueira, Waldemar ...
GRID
2006
Springer
14 years 11 months ago
Performance models for hierarchical grid architectures
Main characteristics of large
Paolo Cremonesi, Roberto Turrin
EDO
2006
Springer
15 years 3 months ago
Tailoring an architectural middleware platform to a heterogeneous embedded environment
Embedded systems are rapidly growing in size, complexity, distribution, and heterogeneity. As a result, the traditional practice of developing one-off embedded applications that a...
Sam Malek, Chiyoung Seo, Nenad Medvidovic
SAMOS
2004
Springer
15 years 5 months ago
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...