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» Compiler Architectures for Heterogeneous Systems
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LCTRTS
2007
Springer
15 years 9 months ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
146
Voted
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
15 years 7 months ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
CLUSTER
2005
IEEE
15 years 9 months ago
Near Overhead-free Heterogeneous Thread-migration
Thread migration moves a single call-stack to another machine to improve either load balancing or locality. Current approaches for checkpointing and thread migration are either no...
Ronald Veldema, Michael Philippsen
ICCL
1992
IEEE
15 years 7 months ago
An automatically generated and provably correct compiler for a subset of Ada
We describe the automatic generation of a provably correct compiler for a non-trivial subset of Ada. The compiler is generated from an emantic description; it emits absolute code ...
Jens Palsberg
DAC
2004
ACM
16 years 4 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan