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» Compiler Architectures for Heterogeneous Systems
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DAC
2004
ACM
16 years 4 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
LCPC
2005
Springer
15 years 9 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
IPPS
2002
IEEE
15 years 8 months ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
118
Voted
IPPS
1998
IEEE
15 years 7 months ago
Preliminary Results from a Parallel MATLAB Compiler
We are developing a compiler that translates ordinary MATLAB scripts into code suitable for compilation and execution on parallel computers supporting C and the MPI message-passin...
Michael J. Quinn, Alexey G. Malishevsky, Nagajagad...
116
Voted
ICCAD
2004
IEEE
100views Hardware» more  ICCAD 2004»
16 years 9 days ago
DynamoSim: a trace-based dynamically compiled instruction set simulator
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Massimo Poncino, Jianwen Zhu