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» Compiler Design Issues for Embedded Processors
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DAC
1997
ACM
15 years 1 months ago
InfoPad - An Experiment in System Level Design and Integration
The InfoPad project was started at UC Berkeley in 1992 to investigate the issues involved in providing multimedia information access using a portable, wireless terminal. It quickl...
Robert W. Brodersen
HIS
2009
14 years 7 months ago
Design Methodology of a Fault Aware Controller Using an Incipient Fault Diagonizer
The problem of failure diagnosis has received a considerable attention in the domain of reliability engineering, process control and computer science. The increasing stringent req...
Joydeb Roychoudhury, Tribeni Prasad Banerjee, Anup...
85
Voted
CASES
2008
ACM
14 years 11 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
15 years 1 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
93
Voted
DAC
2009
ACM
15 years 10 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong