Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
Prolonged secure communication requires trust relationships that extend throughout a connection’s life cycle. Current tools to establish secure connections such as SSL/TLS and S...
Eric Freudenthal, Lawrence Port, Tracy Pesin, Edwa...
Information about online presence allows participants of instant messaging (IM) systems to determine whether their prospective communication partners will be able to answer their ...
Karsten Loesing, Markus Dorsch, Martin Grote, Knut...
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...