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DATE
2004
IEEE
181views Hardware» more  DATE 2004»
15 years 1 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
DAC
1999
ACM
15 years 10 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
DSD
2010
IEEE
162views Hardware» more  DSD 2010»
14 years 8 months ago
A Parallel for Loop Memory Template for a High Level Synthesis Compiler
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...
IPPS
1998
IEEE
15 years 1 months ago
Experimental Study of Compiler Techniques for NUMA Machines
This study1 explores the applicability of fully automatic parallelizing techniques for parallel computers. In this study, we capitalize on a variety of traditional compiling techn...
Yunheung Paek, David A. Padua
CGO
2006
IEEE
15 years 3 months ago
Tailoring Graph-coloring Register Allocation For Runtime Compilation
Just-in-time compilers are invoked during application execution and therefore need to ensure fast compilation times. Consequently, runtime compiler designers are averse to impleme...
Keith D. Cooper, Anshuman Dasgupta