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» Compiler Support for Reducing Leakage Energy Consumption
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COMPUTER
2004
90views more  COMPUTER 2004»
14 years 11 months ago
Power and Energy Management for Server Systems
Power and energy consumption are key concerns for Internet data centers. These centers house hundreds, sometimes thousands, of servers and supporting cooling infrastructures. Rese...
Ricardo Bianchini, Ramakrishnan Rajamony
ICCD
2007
IEEE
109views Hardware» more  ICCD 2007»
15 years 2 months ago
Improving cache efficiency via resizing + remapping
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Subramanian Ramaswamy, Sudhakar Yalamanchili
ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
14 years 11 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
ASPDAC
2008
ACM
83views Hardware» more  ASPDAC 2008»
15 years 1 months ago
Run-time power gating of on-chip routers using look-ahead routing
Since on-chip routers in Network-on-Chips play a key role in on-chip communication between cores, they should be always preparing for packet injections even if a part of cores are ...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...
HPCA
2009
IEEE
15 years 11 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...