Sciweavers

199 search results - page 6 / 40
» Compiler Support for Reducing Leakage Energy Consumption
Sort
View
DAC
2005
ACM
15 years 10 months ago
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Leakage energy consumption is an increasing concern in current and future CMOS technologygenerations. Procrastination scheduling, where task execution can be delayed to maximize t...
Ravindra Jejurikar, Rajesh K. Gupta
IJCSS
2007
133views more  IJCSS 2007»
14 years 9 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja
MJ
2008
67views more  MJ 2008»
14 years 9 months ago
Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits
Circuits optimized for minimum energy consumption operate typically in the subthreshold regime with ultra-low power-supply voltages. Speed of a subthreshold logic circuit is enhan...
Ranjith Kumar, Volkan Kursun
EUC
2004
Springer
15 years 2 months ago
Non-uniform Set-Associative Caches for Power-Aware Embedded Processors
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
Seiichiro Fujii, Toshinori Sato
111
Voted
ICCD
2008
IEEE
498views Hardware» more  ICCD 2008»
15 years 6 months ago
Run-time Active Leakage Reduction by power gating and reverse body biasing: An eNERGY vIEW
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...
Hao Xu, Ranga Vemuri, Wen-Ben Jone