1008 search results - page 150 / 202 » Compiler Technology for Two Novel Computer Architectures |
HPCA
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
HPCA
2004
IEEE
15 years 10 months ago
2004
IEEE
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
GECCO
2007
Springer
15 years 4 months ago
2007
Springer
We present a genetic algorithm which is distributed in two novel ways: along genotype and temporal axes. Our algorithm first distributes, for every member of the population, a su...
HPCA
1999
IEEE
15 years 2 months ago
1999
IEEE
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
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IPPS
1999
IEEE
15 years 2 months ago
1999
IEEE
In this paper we propose the use of an optical network not only as the communication medium, but also as a system-wide cache for the shared data in a multiprocessor. More specifica...