1008 search results - page 150 / 202 » Compiler Technology for Two Novel Computer Architectures |
107
Voted
HPCA
2004
IEEE
16 years 3 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
134
Voted
HPCA
2004
IEEE
16 years 3 months ago
2004
IEEE
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
112
Voted
GECCO
2007
Springer
15 years 9 months ago
2007
Springer
We present a genetic algorithm which is distributed in two novel ways: along genotype and temporal axes. Our algorithm first distributes, for every member of the population, a su...
134
Voted
HPCA
1999
IEEE
15 years 7 months ago
1999
IEEE
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
139
Voted
IPPS
1999
IEEE
15 years 7 months ago
1999
IEEE
In this paper we propose the use of an optical network not only as the communication medium, but also as a system-wide cache for the shared data in a multiprocessor. More specifica...