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» Compiler Technology for Two Novel Computer Architectures
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AAAI
2007
15 years 2 days ago
On the Prospects for Building a Working Model of the Visual Cortex
Human visual capability has remained largely beyond the reach of engineered systems despite intensive study and considerable progress in problem understanding, algorithms and comp...
Thomas Dean, Glenn Carroll, Richard Washington
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
14 years 1 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ICCSA
2007
Springer
15 years 3 months ago
FRASH: Hierarchical File System for FRAM and Flash
Abstract. In this work, we develop novel file system, FRASH, for byteaddressable NVRAM (FRAM[1]) and NAND Flash device. Byte addressable NVRAM and NAND Flash is typified by the DRA...
Eun-ki Kim, Hyungjong Shin, Byung-gil Jeon, Seokhe...
CONEXT
2005
ACM
14 years 11 months ago
MRS: a simple cross-layer heuristic to improve throughput capacity in wireless mesh networks
Wireless Mesh Networks (WMNs) are an emerging architecture based on multi-hop transmission. ISPs considers WMNs as a potential future technology to offer broadband Internet acces...
Luigi Iannone, Serge Fdida
CLADE
2003
IEEE
15 years 3 months ago
vGrid: A Framework For Building Autonomic Applications
With rapid technological advances in network infrastructure, programming languages, compatible component interfaces and so many more areas, today the computational Grid has evolve...
Bithika Khargharia, Salim Hariri, Manish Parashar,...