Sciweavers

1008 search results - page 45 / 202
» Compiler Technology for Two Novel Computer Architectures
Sort
View
ICPP
1998
IEEE
15 years 2 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
IPPS
2006
IEEE
15 years 3 months ago
Investigation into programmability for layer 2 protocol frame delineation architectures
This paper presents the design and study of reconfigurable architectures for two data-link layer frame delineation techniques used for ATM and GFP. The architectures are targeted ...
Ciaran Toal, Sakir Sezer
ESWS
2008
Springer
14 years 11 months ago
An User Interface Adaptation Architecture for Rich Internet Applications
Abstract. The need for adaptive and personalized Rich Internet Application puts a new dimension to already existing approaches of Adaptive Hypermedia Systems. Instead of computing ...
Kay-Uwe Schmidt, Jörg Dörflinger, Tirdad...
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
15 years 4 months ago
Test architecture design and optimization for three-dimensional SoCs
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
Li Jiang, Lin Huang, Qiang Xu
ERSA
2004
130views Hardware» more  ERSA 2004»
14 years 11 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna