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» Compiler Technology for Two Novel Computer Architectures
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SIMUTOOLS
2008
14 years 11 months ago
An 802.16 model for NS2 simulator with an integrated QoS architecture
The IEEE 802.16 technology is emerging as a promising solution for BWA due to its ability to support multimedia services and to operate in multiple physical environments. Also, wi...
Ikbal Chammakhi Msadaa, Fethi Filali, Farouk Kamou...
OPNETEC
2004
Springer
15 years 3 months ago
WONDER: Overview of a Packet-Switched MAN Architecture
: This paper presents the architecture of WONDER, an innovative WDM optical packet network suited for a high-capacity metro environment. The network prototype is under development ...
A. Bianciotto, Roberto Gaudino
HPDC
1999
IEEE
15 years 2 months ago
Starfish: Fault-Tolerant Dynamic MPI Programs on Clusters of Workstations
This paper reports on the architecture and design of Starfish, an environment for executing dynamic (and static) MPI-2 programs on a cluster of workstations. Starfish is unique in ...
Adnan Agbaria, Roy Friedman
DAC
2001
ACM
15 years 10 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
IEEEPACT
1999
IEEE
15 years 2 months ago
Predicated Static Single Assignment
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...