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» Compiler Technology for Two Novel Computer Architectures
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MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 3 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
EUROPAR
2008
Springer
14 years 11 months ago
DGSim: Comparing Grid Resource Management Architectures through Trace-Based Simulation
Abstract. Many advances in grid resource management are still required to realize the grid computing vision of the integration of a worldwide computing infrastructure for scientifi...
Alexandru Iosup, Omer Ozan Sonmez, Dick H. J. Epem...
DAC
2004
ACM
15 years 10 months ago
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of a...
Tim Kogel, Heinrich Meyr
IPPS
2006
IEEE
15 years 3 months ago
Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal
Multi-context FPGAs have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. Large amount of memory causes significant ove...
Yoshihiro Nakatani, Masanori Hariyama, Michitaka K...
BLISS
2009
IEEE
14 years 11 months ago
Autonomous Physical Secret Functions and Clone-Resistant Identification
Self configuring VLSI technology architectures offer a new environment for creating novel security functions. Two such functions for physical security architectures are proposed t...
Wael Adi