1008 search results - page 62 / 202 » Compiler Technology for Two Novel Computer Architectures |
SC
2004
ACM
15 years 3 months ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
ICS
2007
Tsinghua U.
15 years 4 months ago
2007
Tsinghua U.
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
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MICRO
2009
IEEE
15 years 4 months ago
2009
IEEE
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...