Sciweavers

1008 search results - page 78 / 202
» Compiler Technology for Two Novel Computer Architectures
Sort
View
115
Voted
SIPS
2008
IEEE
15 years 7 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
TVLSI
2008
121views more  TVLSI 2008»
15 years 18 days ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
88
Voted
DAC
2006
ACM
16 years 1 months ago
FLAW: FPGA lifetime awareness
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie,...
98
Voted
SAC
2004
ACM
15 years 6 months ago
An architecture for information retrieval over semi-collaborating Peer-to-Peer networks
Peer-to-Peer (P2P) networking is aimed at exploiting the potential of widely distributed information pools and its effortless access and retrieval irrespectively of underlying net...
Iraklis A. Klampanos, Joemon M. Jose
108
Voted
ACSC
2007
IEEE
15 years 7 months ago
Conflict Management For Real-Time Collaborative Editing in Mobile Replicated Architectures
Mobile technology is particularly suited to a fully distributed (replicated) architecture for collaborative work. Users can maintain their own document copies, and can continue to...
Sandy Citro, Jim McGovern, Caspar Ryan