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» Compiler Technology for Two Novel Computer Architectures
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FPL
1994
Springer
435views Hardware» more  FPL 1994»
15 years 4 months ago
Data-Procedural Languages for FPL-based Machines
This paper introduces a new high level programming language for a novel class of computational devices namely data-procedural machines. These machines are by up to several orders o...
Andreas Ast, Jürgen Becker, Reiner W. Hartens...
WEBNET
1997
15 years 2 months ago
Beyond Java: An Infrastructure for High-Performance Mobile Code on the World Wide Web
: We are building an infrastructure for the platform-independent distribution and execution of high-performance mobile code as a future Internet technology to complement and perhap...
Michael Franz
99
Voted
ICS
2010
Tsinghua U.
15 years 3 months ago
Speeding up Nek5000 with autotuning and specialization
Autotuning technology has emerged recently as a systematic process for evaluating alternative implementations of a computation, in order to select the best-performing solution for...
Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun...
98
Voted
DATE
2007
IEEE
156views Hardware» more  DATE 2007»
15 years 7 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...
DSN
2004
IEEE
15 years 4 months ago
The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices
Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS de...
A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rang...