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» Compiler Technology for Two Novel Computer Architectures
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110
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SIGGRAPH
1990
ACM
15 years 4 months ago
The accumulation buffer: hardware support for high-quality rendering
Paul Haeberli and Kurt Akeley SiliconGraphicsComputerSystems This paper describes a system architecture that supports realtime generation of complex images, efficient generation o...
Paul Haeberli, Kurt Akeley
ASAP
2007
IEEE
122views Hardware» more  ASAP 2007»
15 years 7 months ago
Parallelizing HMMER for Hardware Acceleration on FPGAs
Profile based Hidden Markov Model is a widely used tool in bioinformatics. While being very valuable to biologists, it is extremely compute intensive and suffers from prohibitive...
Steven Derrien, Patrice Quinton
97
Voted
CCECE
2006
IEEE
15 years 6 months ago
Evaluation Patterns of Tele-Haptics
Multimedia and Information technology are reaching limits in terms of what can be done in multimedia applications with only sight and sound. The next critical step is to bring the...
Xiaojun Shen, Jilin Zhou, Nicolas D. Georganas
83
Voted
ACII
2007
Springer
15 years 6 months ago
What Should a Generic Emotion Markup Language Be Able to Represent?
Abstract. Working with emotion-related states in technological contexts requires a standard representation format. Based on that premise, the W3C Emotion Incubator group was create...
Marc Schröder, Laurence Devillers, Kostas Kar...
130
Voted
ISHPC
2003
Springer
15 years 5 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos