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» Compiler analysis of irregular memory accesses
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MIDDLEWARE
2010
Springer
14 years 8 months ago
Automatically Generating Symbolic Prefetches for Distributed Transactional Memories
Abstract. Developing efficient distributed applications while managing complexity can be challenging. Managing network latency is a key challenge for distributed applications. We ...
Alokika Dash, Brian Demsky
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
14 years 9 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
IEEEPACT
2008
IEEE
15 years 4 months ago
Exploiting loop-dependent stream reuse for stream processors
The memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory acc...
Xuejun Yang, Ying Zhang, Jingling Xue, Ian Rogers,...
IPPS
2006
IEEE
15 years 4 months ago
A performance model for fine-grain accesses in UPC
UPC’s implicit communication and fine-grain programming style make application performance modeling a challenging task. The correspondence between remote references and communi...
Zhang Zhang, S. R. Seidel
CASES
2001
ACM
15 years 1 months ago
Storage allocation for embedded processors
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
Jan Sjödin, Carl von Platen