93 search results - page 14 / 19 » Compiler analysis of irregular memory accesses |
DAC
2009
ACM
15 years 11 months ago
2009
ACM
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
There is a strong need now for compilers of embedded systems to find effective ways of optimizing series of loop-nests, wherein majority of the memory references occur in the fo...
TCAD
2008
14 years 9 months ago
2008
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
CGO
2008
IEEE
15 years 4 months ago
2008
IEEE
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
SC
2005
ACM
15 years 3 months ago
2005
ACM
The memory consistency model in parallel programming controls the order in which operations performed by one thread may be observed by another. Language designers have been reluct...