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» Compiler analysis of irregular memory accesses
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ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
14 years 9 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
ICS
2005
Tsinghua U.
15 years 3 months ago
Towards automatic translation of OpenMP to MPI
We present compiler techniques for translating OpenMP shared-memory parallel applications into MPI messagepassing programs for execution on distributed memory systems. This transl...
Ayon Basumallik, Rudolf Eigenmann
IWMM
2011
Springer
217views Hardware» more  IWMM 2011»
14 years 24 days ago
On the theory and potential of LRU-MRU collaborative cache management
The goal of cache management is to maximize data reuse. Collaborative caching provides an interface for software to communicate access information to hardware. In theory, it can o...
Xiaoming Gu, Chen Ding
CODES
2007
IEEE
15 years 4 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
POPL
2007
ACM
15 years 10 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...