Sciweavers

1141 search results - page 140 / 229
» Compiler-Directed Performance Model Construction for Paralle...
Sort
View
90
Voted
CCGRID
2001
IEEE
15 years 4 months ago
xBSP: An Efficient BSP Implementation for clan
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of high performance of VIA, the previous MPI implementati...
Yang-Suk Kee, Soonhoi Ha
104
Voted
AAAI
1998
15 years 2 months ago
Opponent Modeling in Poker
Poker is an interesting test-bed for artificial intelligence research. It is a game of imperfect knowledge, where multiple competing agents must deal with risk management, agent m...
Darse Billings, Denis Papp, Jonathan Schaeffer, Du...
EGC
2005
Springer
15 years 6 months ago
Statistical Modeling and Segmentation in Cardiac MRI Using a Grid Computing Approach
Abstract. Grid technology is widely emerging as a solution for wide-spread applicability of computerized analysis and processing procedures in biomedical sciences. In this paper we...
Sebastián Ordas, Hans C. van Assen, Loic Bo...
111
Voted
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
15 years 4 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
83
Voted
IPPS
2002
IEEE
15 years 5 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...