1141 search results - page 147 / 229 » Compiler-Directed Performance Model Construction for Paralle... |
112
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IEEEPACT
2005
IEEE
15 years 6 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
95
Voted
IPPS
2000
IEEE
15 years 5 months ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
114
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IEEEPACT
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
111
Voted
SBACPAD
2008
IEEE
15 years 7 months ago
2008
IEEE
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
112
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LCPC
2007
Springer
15 years 6 months ago
2007
Springer
Abstract. Partitioned Global Address Space (PGAS) languages offer an attractive, high-productivity programming model for programming large-scale parallel machines. PGAS languages, ...