1141 search results - page 175 / 229 » Compiler-Directed Performance Model Construction for Paralle... |
99
Voted
ICPP
1995
IEEE
15 years 4 months ago
1995
IEEE
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
151
Voted
HPCA
2003
IEEE
16 years 27 days ago
2003
IEEE
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
101
Voted
ICDCS
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper presents a design and analysis of scheduling techniques to cope with the inherent unreliability and instability of worker nodes in large-scale donation-based distribute...
90
Voted
PODC
1995
ACM
15 years 4 months ago
1995
ACM
The Horus system supports a communication architecture ats protocols as instances of an abstract data type. This approach encourages developers to partition complex protocols into...
88
Voted
APPT
2005
Springer
15 years 6 months ago
2005
Springer
By reasonably allocating a cooperative problem which need multiple solvers cope with together, the problem could be performed more effectively and efficiently. A problem could be d...