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PDP
2005
IEEE
15 years 10 months ago
A Comparison Study of the HLRC-DU Protocol versus a HLRC Hardware Assisted Protocol
SVM systems are a cheaper and flexible way to implement the shared memory programming paradigm. Their huge flexibility is due to their software implementation; however, this is al...
Salvador Petit, Julio Sahuquillo, Ana Pont
IEEEAMS
2003
IEEE
15 years 10 months ago
Communication Pattern Based Node Selection for Shared Networks
Selection of the most suitable nodes on a network to execute a parallel application requires matching the network status to the application requirements. We propose and validate a...
Srikanth Goteti, Jaspal Subhlok
ICS
2010
Tsinghua U.
15 years 9 months ago
Overlapping communication and computation by using a hybrid MPI/SMPSs approach
– Communication overhead is one of the dominant factors that affect performance in high-performance computing systems. To reduce the negative impact of communication, programmers...
Vladimir Marjanovic, Jesús Labarta, Eduard ...
EUROPAR
2010
Springer
15 years 5 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
15 years 9 months ago
Data marshaling for multi-core architectures
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
M. Aater Suleman, Onur Mutlu, José A. Joao,...