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PLDI
2006
ACM
15 years 10 months ago
Automatic instruction scheduler retargeting by reverse-engineering
In order to generate high-quality code for modern processors, a compiler must aggressively schedule instructions, maximizing resource utilization for execution efficiency. For a ...
Matthew J. Bridges, Neil Vachharajani, Guilherme O...
SAC
2009
ACM
15 years 9 months ago
Aspect-oriented procedural content engineering for game design
Generally progressive procedural content in the context of 3D scene rendering is expressed as recursive functions where a finer level of detail gets computed on demand. Typical e...
Walter Cazzola, Diego Colombo, Duncan Harrison
DAC
2009
ACM
16 years 5 months ago
Dynamic thermal management via architectural adaptation
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...
Ramkumar Jayaseelan, Tulika Mitra
ASPLOS
2010
ACM
15 years 11 months ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 10 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...