1141 search results - page 60 / 229 » Compiler-Directed Performance Model Construction for Paralle... |
148
click to vote
POPL
2009
ACM
15 years 7 months ago
2009
ACM
Transactional memory (TM) provides a safer, more modular, and more scalable alternative to traditional lock-based synchronization. Implementing high performance TM systems has rec...
84
Voted
SIGCSE
2010
ACM
15 years 7 months ago
2010
ACM
The technique of scaling hardware performance through increasing the number of cores on a chip requires programmers to learn to write parallel code that can exploit this hardware....
111
Voted
PPSC
1993
15 years 1 months ago
1993
Scalable parallel computers with TFLOPS (Trillion FLoating Point Operations Per Second) performance levels are now under construction. While we believe TFLOPS processor technology...
108
click to vote
IPPS
2000
IEEE
15 years 5 months ago
2000
IEEE
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
109
click to vote
PODC
2010
ACM
15 years 4 months ago
2010
ACM
Concurrent collection classes are widely used in multi-threaded programming, but they provide atomicity only for a fixed set of operations. Software transactional memory (STM) pr...