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TVLSI
2008
187views more  TVLSI 2008»
14 years 10 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
CASES
2010
ACM
14 years 8 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
CODES
2007
IEEE
15 years 4 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
JOT
2006
113views more  JOT 2006»
14 years 10 months ago
Constraint Validation in Model Compilers
Model transformation has become one of the most focused research field, motivated by for instance the OMG's Model-Driven Architecture (MDA). Metamodeling is a central techniq...
László Lengyel, Tihamer Levendovszky...
ECRTS
1998
IEEE
15 years 2 months ago
Facilitating worst-case execution times analysis for optimized code
In this paper we present co-transformation, a novel approach to the mapping of execution information from the source code of a program to the object code for the purpose of worst-...
Jakob Engblom, Andreas Ermedahl, Peter Altenbernd