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DAC
1999
ACM
16 years 6 days ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
ICS
2009
Tsinghua U.
15 years 6 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
ICSM
2006
IEEE
15 years 5 months ago
Source-Level Linkage: Adding Semantic Information to C++ Fact-bases
Facts extracted from source code have been used to support a variety of software engineering activities, ranging from architectural understanding, through detection of design patt...
Daqing Hou, H. James Hoover
ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
15 years 5 months ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
EGH
2005
Springer
15 years 4 months ago
Optimal automatic multi-pass shader partitioning by dynamic programming
Complex shaders must be partitioned into multiple passes to execute on GPUs with limited hardware resources. Automatic partitioning gives rise to an NP-hard scheduling problem tha...
Alan Heirich