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IPPS
1997
IEEE
15 years 1 months ago
A Compile-Time Partitioning Strategy for Non-Rectangular Loop Nests
This paper presents a compile-time scheme for partitioning non-rectangular loop nests which consist of inner loops whose bounds depend on the index of the outermost, parallel loop...
Rizos Sakellariou
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
15 years 3 months ago
An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
Rui Rodrigues, João M. P. Cardoso
FPL
1995
Springer
152views Hardware» more  FPL 1995»
15 years 1 months ago
Compiling Ruby into FPGAs
This paper presents an overview of a prototype hardware compiler which compiles a design expressed in the Ruby language into FPGAs. The features of two important modules, the re ne...
Shaori Guo, Wayne Luk
68
Voted
CORR
2010
Springer
97views Education» more  CORR 2010»
14 years 9 months ago
Continuation-Passing C, compiling threads to events through continuations
Abstract In this paper, we introduce Continuation Passing C (CPC), a programming language for concurrent systems in which native and cooperative threads are unified and presented t...
Gabriel Kerneis, Juliusz Chroboczek
CC
1999
Springer
107views System Software» more  CC 1999»
15 years 1 months ago
Link-Time Improvement of Scheme Programs
Abstract. Optimizing compilers typically limit the scope of their analyses and optimizations to individual modules. This has two drawbacks: rst, library code cannot be optimized to...
Saumya K. Debray, Robert Muth, Scott A. Watterson