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ISCA
1999
IEEE
96views Hardware» more  ISCA 1999»
15 years 4 months ago
PipeRench: A Coprocessor for Streaming multimedia Acceleration
Future computing workloads will emphasize an architecture's ability to perform relatively simple calculations on massive quantities of mixed-width data. This paper describes ...
Seth Copen Goldstein, Herman Schmit, Matthew Moe, ...
ASPDAC
1998
ACM
86views Hardware» more  ASPDAC 1998»
15 years 4 months ago
Parallelization in Co-Compilation for Configurable Accelerators
— The paper introduces a novel co-compiler and its “vertical” parallelization method, including a general model for co-operating host/accelerator platforms and a new parallel...
Jürgen Becker, Reiner W. Hartenstein, Michael...
IPPS
2006
IEEE
15 years 5 months ago
Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framew
In reconfigurable systems, reconfiguration latency is a very important factor impact the system performance. In this paper, a framework is proposed that integrates the temporal pa...
Farhad Mehdipour, Morteza Saheb Zamani, H. R. Ahma...
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 3 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 4 months ago
A Compiler-Based Approach for Improving Intra-Iteration Data Reuse
Intra-iteration data reuse occurs when multiple array references exhibit data reuse in a single loop iteration. An optimizing compiler can exploit this reuse by clustering (in the...
Mahmut T. Kandemir