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» Compiling SA-C Programs to FPGAs: Performance Results
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LCTRTS
2010
Springer
14 years 9 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
ERSA
2006
129views Hardware» more  ERSA 2006»
15 years 1 months ago
Group-Alignment based Accurate Floating-Point Summation on FPGAs
Floating-point summation is one of the most important operations in scientific/numerical computing applications and also a basic subroutine (SUM) in BLAS (Basic Linear Algebra Sub...
Chuan He, Guan Qin, Mi Lu, Wei Zhao
TPDS
1998
114views more  TPDS 1998»
14 years 11 months ago
On the Automatic Parallelization of the Perfect Benchmarks
We present a set of advanced program parallelization techniques that are able to signi cantly improve the performance of application programs. We present evidence for this improve...
Rudolf Eigenmann, Jay Hoeflinger, David A. Padua
HOTOS
2003
IEEE
15 years 5 months ago
Cassyopia: Compiler Assisted System Optimization
Execution of a program almost always involves multiple address spaces, possibly across separate machines. Here, an approach to reducing such costs using compiler optimization tech...
Mohan Rajagopalan, Saumya K. Debray, Matti A. Hilt...
LCTRTS
2004
Springer
15 years 5 months ago
Finding effective compilation sequences
Most modern compilers operate by applying a fixed, program-independent sequence of optimizations to all programs. Compiler writers choose a single “compilation sequence”, or ...
L. Almagor, Keith D. Cooper, Alexander Grosul, Tim...