500 search results - page 11 / 100 » Compiling SA-C Programs to FPGAs: Performance Results |
152
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FPGA
2005
ACM
15 years 11 months ago
2005
ACM
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
219
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FCCM
2011
IEEE
14 years 9 months ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
136
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CCS
2009
ACM
16 years 7 days ago
2009
ACM
We enforce information flow policies in programs that run at multiple locations, with diverse levels of security. We build a compiler from a small imperative language with locali...
190
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SC
1993
ACM
15 years 9 months ago
1993
ACM
In this paper, we describe two new ideas by which HPF compiler can deal with irregular computations e ectively. The rst mechanism invokes a user speci ed mapping procedure via a s...
198
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FROCOS
2000
Springer
15 years 9 months ago
2000
Springer
This paper describes a high-level implementation of the concurrent constraint functional logic language Curry. The implementation, directed by the lazy pattern matching strategy of...