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» Compiling SA-C Programs to FPGAs: Performance Results
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DSD
2008
IEEE
165views Hardware» more  DSD 2008»
15 years 6 months ago
Application Analysis for Parallel Processing
Effective mapping of multimedia applications on massively parallel embedded systems is a challenging demand in the domain of compiler design. The software implementations of emerg...
Muhammad Rashid, Damien Picard, Bernard Pottier
IWMM
2010
Springer
118views Hardware» more  IWMM 2010»
15 years 4 months ago
Speculative parallelization using state separation and multiple value prediction
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
Chen Tian, Min Feng, Rajiv Gupta
EMSOFT
2004
Springer
15 years 5 months ago
Approximation of the worst-case execution time using structural analysis
We present a technique to approximate the worst-case execution time that combines structural analysis with a loop-bounding algorithm based on local induction variable analysis. St...
Matteo Corti, Thomas R. Gross
PPOPP
2009
ACM
16 years 8 days ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
15 years 3 months ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...