500 search results - page 86 / 100 » Compiling SA-C Programs to FPGAs: Performance Results |
DAC
2006
ACM
16 years 20 days ago
2006
ACM
In this paper, we present a methodology for low-cost and rapid context switch for multithreaded embedded processors with realtime guarantees. Context-switch, which involves saving...
133
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ICCD
2008
IEEE
15 years 8 months ago
2008
IEEE
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
DAC
2002
ACM
16 years 20 days ago
2002
ACM
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
111
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IEEEPACT
2009
IEEE
15 years 6 months ago
2009
IEEE
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
ICASSP
2008
IEEE
15 years 6 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...