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» Compiling SA-C Programs to FPGAs: Performance Results
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ASE
2004
108views more  ASE 2004»
14 years 11 months ago
CODEWEAVE: Exploring Fine-Grained Mobility of Code
er is concerned with an abstract exploration of code mobility constructs designed for use in settings where the level of granularity associated with the mobile units exhibits sign...
Cecilia Mascolo, Gian Pietro Picco, Gruia-Catalin ...
RTSS
2003
IEEE
15 years 4 months ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue
MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
15 years 6 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...
IPSN
2007
Springer
15 years 5 months ago
Harbor: software-based memory protection for sensor nodes
Many sensor nodes contain resource constrained microcontrollers where user level applications, operating system components, and device drivers share a single address space with no...
Ram Kumar, Eddie Kohler, Mani B. Srivastava
95
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ETFA
2008
IEEE
15 years 6 months ago
Pinpointing interrupts in embedded real-time systems using context checksums
When trying to track down bugs using cyclic debugging, the ability to correctly reproduce executions is imperative. In sequential, deterministic, non-real-time software, this repr...
Daniel Sundmark, Henrik Thane