Sciweavers

82 search results - page 14 / 17
» Compiling code accelerators for FPGAs
Sort
View
ASPLOS
2010
ACM
15 years 6 months ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...
88
Voted
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
14 years 9 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
115
Voted
DAC
2003
ACM
16 years 17 days ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
87
Voted
FCCM
2007
IEEE
146views VLSI» more  FCCM 2007»
15 years 6 months ago
Mitrion-C Application Development on SGI Altix 350/RC100
This paper provides an evaluation of SGI® RASC™ RC100 technology from a computational science software developer’s perspective. A brute force implementation of a two-point an...
Volodymyr V. Kindratenko, Robert J. Brunner, Adam ...
CODES
2009
IEEE
15 years 3 months ago
Building heterogeneous reconfigurable systems with a hardware microkernel
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a softwarelike ...
Jason Agron, David L. Andrews