82 search results - page 7 / 17 » Compiling code accelerators for FPGAs |
HIPEAC
2010
Springer
15 years 1 months ago
2010
Springer
We present Offload, a programming model for offloading parts of a C++ application to run on accelerator cores in a heterogeneous multicore system. Code to be offloaded is enclosed ...
FCCM
2005
IEEE
15 years 5 months ago
2005
IEEE
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
91
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CASES
2006
ACM
15 years 5 months ago
2006
ACM
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
101
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FPL
2010
Springer
14 years 9 months ago
2010
Springer
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
CODES
2008
IEEE
15 years 6 months ago
2008
IEEE
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...