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» Compiling for EDGE Architectures
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107
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ICS
2001
Tsinghua U.
15 years 6 months ago
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...
127
Voted
PODC
1999
ACM
15 years 6 months ago
Dynamically Configurable Distributed Objects
The dynamically configurable distributed object (DCDO) model helps enable object evolution and facilitate the development of distributed objects from multiple independent implemen...
Michael J. Lewis, Andrew S. Grimshaw
150
Voted
WACC
1999
ACM
15 years 6 months ago
Building a federation of process support systems
The effort in software process support has focused so far on modeling and enacting processes. A certain amount of work has been done, but little has reached a satisfactory level o...
Jacky Estublier, Mahfoud Amiour, Samir Dami
ISCA
1999
IEEE
110views Hardware» more  ISCA 1999»
15 years 6 months ago
Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
ICS
1999
Tsinghua U.
15 years 6 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...